//Copyright (C)2014-2024 GOWIN Semiconductor Corporation.
//All rights reserved.
//File Title: Timing Constraints file
//Tool Version: V1.9.9 (64-bit) 
//Created Time: 2024-06-05 16:53:49
create_clock -name xtal_clk -period 37.037 -waveform {0 18.518} [get_ports {xtal_clk}]
create_generated_clock -name sys_clk -source [get_ports {xtal_clk}] -master_clock xtal_clk -divide_by 9 [get_nets {sys_clk}]
